Design of an ultra low voltage analog front end for an electroencephalography system
Identifieur interne : 000505 ( Main/Exploration ); précédent : 000504; suivant : 000506Design of an ultra low voltage analog front end for an electroencephalography system
Auteurs : Alfredo Farid Bautista-Delgado [France]Source :
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Abstract
In this dissertation a full custom Analog Front End (AFE) integrated circuit (IC) for an Electroencephalography system (EEG) is designed and implemented. The AFE consists of an ultra-low voltage amplifier and a Continuous-Time Σ∆ Analog-to-Digital converter (CT Σ∆ ADC). The AFE was implemented in 0.35 um CMOS process technology, and it works with a supply voltage of 0.5V.
In order to provide a true low voltage operation, all the transistors are working in the subthreshold region. The proposed preamplifier's topology consists of an input stage based on a folded cascoded amplifier and an output stage based on a current source amplifier.
The CT Σ∆ Modulator was selected to provide a very low power dissipation. The decimation stage is based in a Finite Impulse Response (FIR) filter. The Modulator works with a supply voltage of 0.5V while the FIR stage, which was not optimized, works with a 1V power supply voltage. Testing results show that the OTA has an open loop gain of 38:8dB and 18.6 dB in its 1st and 2nd stages, respectively. Also, the OTA device has bandwidths in its 1st and
2nd stages of 10.23KHz and 6.45KHz, respectively. Other obtained OTA character-
istics are: output noise of 1:4mV rms@100Hz and power dissipation of 1,89uW. The ADC shows the following characteristics: SNR of 94.2dB, ENOB of 15:35bits, INL of +0.34/-2.3 LSB, DNL +.783/-.62 LSB without missing single code. The modulator dissipates only 7uW. The proposed AFE has one of the best performance among all
the devices reviewed in today's literature. The AFE's performance make it suitable for biomedical low-power dissipation applications such as portable EEG devices.
In addition to the CT-Σ∆ modulator developed in 0.35um CMOS technology, an alternative Modulator was designed using a 0.13um CMOS technology, based on the Discrete Time counterpart. The simulation shows a SNR of 92dB and ENOB of 14.99dB for an oversampling rate (OSR) of 150.
In order to provide a true low voltage operation, all the transistors are working in the subthreshold region. The proposed preamplifier's topology consists of an input stage based on a folded cascoded amplifier and an output stage based on a current source amplifier.
The CT Σ∆ Modulator was selected to provide a very low power dissipation. The decimation stage is based in a Finite Impulse Response (FIR) filter. The Modulator works with a supply voltage of 0.5V while the FIR stage, which was not optimized, works with a 1V power supply voltage. Testing results show that the OTA has an open loop gain of 38:8dB and 18.6 dB in its 1st and 2nd stages, respectively. Also, the OTA device has bandwidths in its 1st and
2nd stages of 10.23KHz and 6.45KHz, respectively. Other obtained OTA character-
istics are: output noise of 1:4mV rms@100Hz and power dissipation of 1,89uW. The ADC shows the following characteristics: SNR of 94.2dB, ENOB of 15:35bits, INL of +0.34/-2.3 LSB, DNL +.783/-.62 LSB without missing single code. The modulator dissipates only 7uW. The proposed AFE has one of the best performance among all
the devices reviewed in today's literature. The AFE's performance make it suitable for biomedical low-power dissipation applications such as portable EEG devices.
In addition to the CT-Σ∆ modulator developed in 0.35um CMOS technology, an alternative Modulator was designed using a 0.13um CMOS technology, based on the Discrete Time counterpart. The simulation shows a SNR of 92dB and ENOB of 14.99dB for an oversampling rate (OSR) of 150.
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The AFE consists of an ultra-low voltage amplifier and a Continuous-Time Σ∆ Analog-to-Digital converter (CT Σ∆ ADC). The AFE was implemented in 0.35 um CMOS process technology, and it works with a supply voltage of 0.5V.
In order to provide a true low voltage operation, all the transistors are working in the subthreshold region. The proposed preamplifier's topology consists of an input stage based on a folded cascoded amplifier and an output stage based on a current source amplifier.
The CT Σ∆ Modulator was selected to provide a very low power dissipation. The decimation stage is based in a Finite Impulse Response (FIR) filter. The Modulator works with a supply voltage of 0.5V while the FIR stage, which was not optimized, works with a 1V power supply voltage. Testing results show that the OTA has an open loop gain of 38:8dB and 18.6 dB in its 1st and 2nd stages, respectively. Also, the OTA device has bandwidths in its 1st and
2nd stages of 10.23KHz and 6.45KHz, respectively. Other obtained OTA character-
istics are: output noise of 1:4mV rms@100Hz and power dissipation of 1,89uW. The ADC shows the following characteristics: SNR of 94.2dB, ENOB of 15:35bits, INL of +0.34/-2.3 LSB, DNL +.783/-.62 LSB without missing single code. The modulator dissipates only 7uW. The proposed AFE has one of the best performance among all
the devices reviewed in today's literature. The AFE's performance make it suitable for biomedical low-power dissipation applications such as portable EEG devices.
In addition to the CT-Σ∆ modulator developed in 0.35um CMOS technology, an alternative Modulator was designed using a 0.13um CMOS technology, based on the Discrete Time counterpart. The simulation shows a SNR of 92dB and ENOB of 14.99dB for an oversampling rate (OSR) of 150.</div></front></TEI><affiliations><list><country><li>France</li></country><region><li>Auvergne-Rhône-Alpes</li><li>Rhône-Alpes</li></region><settlement><li>Grenoble</li></settlement><orgName><li>Université Joseph Fourier</li><li>Université de Grenoble</li></orgName></list><tree><country name="France"><region name="Auvergne-Rhône-Alpes"><name sortKey="Bautista Delgado, Alfredo Farid" sort="Bautista Delgado, Alfredo Farid" uniqKey="Bautista Delgado A" first="Alfredo Farid" last="Bautista-Delgado">Alfredo Farid Bautista-Delgado</name></region></country></tree></affiliations></record>Pour manipuler ce document sous Unix (Dilib)
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